Friday 23 October 2015

Universal asynchronous receiver/transmitter (UART)

universal asynchronous receiver/transmitter, abbreviated UART  is a computer hardware device that translates data between parallel and serial forms. UARTs are commonly used in conjunction with communication standards such as TIA (formerly EIARS-232RS-422 or RS-485. The universal designation indicates that the data format and transmission speeds are configurable. The electric signaling levels and methods (such as differential signaling etc.) are handled by a driver circuit external to the UART.
A UART is usually an individual (or part of an) integrated circuit (IC) used for serial communications over a computer or peripheral device serial port. UARTs are now commonly included in microcontrollers. A dual UART, or DUART, combines two UARTs into a single chip. An octal UART or OCTART combines eight UARTs into one package, an example being the NXP SCC2698. Many modern ICs now come with a UART that can also communicate synchronously; these devices are called USARTs (universal synchronous/asynchronous receiver/transmitter)

History

Some early telegraph schemes used variable-length pulses (as in Morse code) and rotating clockwork mechanisms to transmit alphabetic characters. The first serial communication devices (with fixed-length pulses) were rotating mechanical switches (commutators). Various character codes using 5, 6, 7, or 8 data bits became common in teleprinters and later as computer peripherals. The teletypewriter made an excellent general-purpose I/O device for a small computer.
Gordon Bell of DEC designed the first UART, occupying an entire circuit board called a line unit, for the PDP series of computers beginning with the PDP-1.[2][3] According to Bell, the main innovation of the UART was its use of sampling to convert the signal into the digital domain, allowing more reliable timing than previous circuits that used analog timing devices with manually adjusted potentiometers.[4] To reduce the cost of wiring, backplane and other components, these computers also pioneered flow control using XON and XOFF characters rather than hardware wires.
DEC condensed the line unit design into an early single-chip UART for their own use.[2] Western Digital developed this into the first widely available single-chip UART, the WD1402A, around 1971. This was an early example of a medium scale integrated circuit. Another popular chip was the SCN2651 from the Signetics 2650 family.
An example of an early 1980s UART was the National Semiconductor 8250. In the 1990s, newer UARTs were developed with on-chip buffers. This allowed higher transmission speed without data loss and without requiring such frequent attention from the computer. For example, the popular National Semiconductor 16550 has a 16 byte FIFO, and spawned many variants, including the 16C550, 16C650, 16C750, and 16C850.
Depending on the manufacturer, different terms are used to identify devices that perform the UART functions. Intel called their 8251 device a "Programmable Communication Interface". MOS Technology 6551 was known under the name "Asynchronous Communications Interface Adapter" (ACIA). The term "Serial Communications Interface" (SCI) was first used at Motorola around 1975 to refer to their start-stop asynchronous serial interface device, which others were calling a UART. Zilog manufactured a number of Serial Communication Controllers or SCCs.
After the RS-232 COM port was removed from most IBM PC compatible computers in the 2000s, an external USB-to-UART serial adapter cable was used to compensate for the loss. A major supplier of these chips is FTDI.[5]
                           

Structure

A UART usually contains the following components:
  • a clock generator, usually a multiple of the bit rate to allow sampling in the middle of a bit period.
  • input and output shift registers
  • transmit/receive control
  • read/write control logic
  • transmit/receive buffers (optional)
  • parallel data bus buffer (optional)
  • First-in, first-out (FIFO) buffer memory (optional)

    UART models

    ModelDescription
    WD1402AThe first single-chip UART on general sale. Introduced about 1971. Compatible chips included the Fairchild TR1402A and the General Instruments AY-5-1013.[6]
    Exar XR21V1410
    Intersil 6402
    CDP 1854 (RCA, now Intersil)
    Zilog Z84402000 kbit/s. Async, BisyncSDLCHDLCX.25CRC. 4-byte RX buffer. 2-byte TX buffer. DMA.[7]
    8250Obsolete with 1-byte buffers. These UARTs' maximum standard serial port speed is 9600 bits per second if the operating system has a 1 millisecondinterrupt latency. 8250 UARTs were used in the IBM PC 5150 and IBM PC/XT, while the 16450 UART were used in IBM PC/AT-series computers.
    8251
    Z8530/85C30
    Motorola 6850
    6551
    Rockwell 65C52
    16450
    82510This UART allows asynchronous operation up to 288 kbit/s, with two independent four-byte FIFOs. It was produced by Intel at least from 1993 to 1996, and Innovastic Semiconductor has a 2011 Data Sheet for IA82510.
    16550This UART's FIFO was broken, so it cannot safely run any faster than the 16450 UART. The 16550A and later versions fix this bug.
    16550AThis UART has 16-byte FIFO buffers. Its receive interrupt trigger levels can be set to 1, 4, 8, or 14 characters. Its maximum standard serial port speed if the operating system has a 1 millisecond interrupt latency is 115.2 kbit/s. Operating systems with lower interrupt latencies could handle higher baud rates like 230.4 kbit/s or 460.8 kbit/s. This chip can provide signals to facilitate a third party DMA controller perform DMA transfers to and from the UART. This was known as DMA mode because it was meant to be coupled with a DMA controller in this mode to perform the transfers on behalf of the CPU.[8] It was introduced by National Semiconductor, which has been sold to Texas Instruments. National Semiconductor claimed that this UART could physically run at up to 1.5 Mbit/s.
    16C552
    16650This UART was introduced by Startech Semiconductor which is now owned by Exar Corporation and is not related to Startech.com. Early versions had a broken FIFO buffer and therefore cannot safely run any faster than the 16450 UART.[9] Versions of this UART that were not broken had 32-character FIFO buffers and could function at standard serial port speeds up to 230.4 kbit/s if the operating system has a 1 millisecond interrupt latency. Current versions of this UART by Exar claim to be able to physically handle up to 1.5 Mbit/s. This UART introduces the Auto-RTS and Auto-CTS features in which the RTS# signal is controlled by the UART to signal the external device to stop transmitting when the UART's buffer is full to or beyond a user-set trigger point and to stop transmitting to the device when the device drives the CTS# signal high (logic 0).
    1675064-byte buffers. This UART can handle a maximum standard serial port speed of 460.8 kbit/s if the maximum interrupt latency is 1 millisecond. This UART was introduced by Texas Instruments. TI claims that early models can run up to 1 Mbit/s physically, and later models can run up to 5 Mbit/s physically.
    16850128-byte buffers. This UART can handle a maximum standard serial port speed of 921.6 kbit/s if the maximum interrupt latency is 1 millisecond. This UART was introduced by Exar Corporation. Exar claims that early models can run up to 1.5 Mbit/s physically, and later models can run up to 6.25 Mbit/s physically.
    16C850
    16950128-byte buffers. This UART can handle a maximum standard serial port speed of 921.6 kbit/s if the maximum interrupt latency is 1 millisecond and if the UART is not connected to a DMA engine or is connected to a DMA engine that is not enabled. This UART supports 9-bit characters in addition to the 5-8 bit characters other UARTs support. This was introduced by Oxford Semiconductor, which is now owned by PLX Technology. Oxford/PLX claims that this UART can run up to 15 Mbit/s physically. PCI Express variants by Oxford/PLX can safely run much faster than other variants because they are integrated with a first party bus mastering PCIe DMA engine. This DMA engine is controlled by the UART's DMA mode signals that were defined for the 16550. The DMA engine will prevent buffer overruns by moving data in the receive buffer to the host computer's memory via PCIe, and can speed up transmission by moving data to be sent in the host computer's memory to the transmit buffer if it is not full. Both of these operations do require some setup by the CPU, but are automated by the UART and the DMA engine after setup is complete.
    16C950
    16954Quad port version of the 16950/16C950. 128-byte buffers per port. This UART can handle a maximum standard serial port speed of 921.6 kbit/s if the maximum interrupt latency is 1 millisecond and if the UART is not connected to a DMA engine or is connected to a DMA engine that is not enabled. This UART supports 9-bit characters in addition to the 5-8 bit characters other UARTs support. This was introduced by Oxford Semiconductor, which is now owned by PLX Technology. Oxford/PLX claims that this UART can run up to 15 Mbit/s physically. PCI Express variants by Oxford/PLX can safely run much faster than other variants because they are integrated with a first party bus mastering PCIe DMA engine. This DMA engine is controlled by the UART's DMA mode signals that were defined for the 16550. The DMA engine will prevent buffer overruns by moving data in the receive buffer to the host computer's memory via PCIe, and can speed up transmission by moving data to be sent in the host computer's memory to the transmit buffer if it is not full. Both of these operations do require some setup by the CPU, but are automated by the UART and the DMA engine after setup is complete.
    16C954
    16C1550/16C1551UART with 16-byte FIFO buffers. Up to 1.5 Mbit/s. The ST16C155X is not compatible with the industry standard 16550 and will not work with the standard serial port driver in Microsoft Windows.
    16C2450Dual UART with 1-byte FIFO buffers.
    16C2550Dual UART with 16-byte FIFO buffers. Pin-to-pin and functional compatible to 16C2450. Software compatible with INS8250 and NS16C550.
    SCC2691Currently produced by NXP, the 2691 is a single channel UART that also includes a programmable counter/timer. The 2691 has a single byte transmitter holding register and a 4-byte receive FIFO. Maximum standard speed of the 2692 is 115.2 kbit/s. Non-standard speeds are supported.
    SCC2692Currently produced by NXP, these dual UARTs (DUART) are essentially a pair of SCC2691 UARTs in a single package, but with a common counter/timer. Each channel is independently programmable and supports independent transmit and receive data rates. Like the 2691, the 2692 has a single byte transmitter holding register and a 4-byte receive FIFO per channel. Maximum standard speed of both of the 2692's channels is 115.2 kbit/s.
    The 26C92 is an upwardly compatible version of the dual channel 2692, with 8-byte transmit and receive FIFOs for improved performance during continuous bi-directional asynchronous transmission (CBAT) on both channels at the maximum standard speed of 230.4 kbit/s.
    Both the 2692 and 26C92 may also be operated in RS-422 and RS-485 modes, and can also be programmed to support non-standard data rates. The devices are produced in PDIP-40, PLCC-44 and 44 pin QFP packages, and are readily adaptable to both Motorola and Intel buses. They have also been successfully adapted to the 65C02 and 65C816 buses.
    SC26C92
    SCC2698BCurrently produced by NXP, the 2698 octal UART (OCTART) is essentially four SCC2692 DUARTs in a single package. Specifications are the same as the SCC2692 (not the SCC26C92). The device is produced in PDIP-64 and PLCC-84 packages, and is readily adaptable to both Motorola and Intel buses. The 2698 has also been successfully adapted to the 65C02 and 65C816 buses.
    SCC28C94Currently produced by NXP, the 28C94 quadruple UART (QUART) is functionally similar to a pair of SCC26C92 DUARTs mounted in a common package. Some additional signals are present for interrupt management and the auxiliary input/output pins are arranged differently than those of the 26C92. Otherwise, the programming model for the 28C94 is very similar to that of the 26C92, requiring only minor code changes. The 28C94 supports a maximum standard speed of 230.4 kbit/s, is available in a PLCC-52 package, and is readily adaptable to both Motorola and Intel buses.
    SCC28L198Currently produced by NXP, the 28L198 octal UART (OCTART) is essentially an upscaled enhancement of the SCC28C94 QUART (described above), with eight independent communications channels, as well as an arbitrated interrupt system for efficient processing during periods of intense channel activity. The 28L198 supports a maximum standard speed of 460.8 kbit/s, is available in PLCC-84 and LQFP-100 packages, and is readily adaptable to both Motorola and Intel buses. The 28L198 will operate on 3.3 or 5 volts.
    Z85230Synchronous/Asynchronous modes, 2 ports, DMA. 4-byte buffer to send, 8-byte buffer to receive per channel. SDLC/HDLC modes. 5 Mbit/s in synchronous mode.
    Hayes ESP1 kB buffers, 921.6 kbit/s, 8-ports.[10]
    Exar XR17V352, XR17V354 and XR17V358Dual, Quad and Octal PCI Express UARTs with 16550 compatible register Set, 256-byte TX and RX FIFOs, Programmable TX and RX Trigger Levels, TX/RX FIFO Level Counters, Fractional baud rate generator, Automatic RTS/CTS or DTR/DSR hardware flow control with programmable hysteresis, Automatic Xon/Xoff software flow control, RS-485 half duplex direction control output with programmable turn-around delay, Multi-drop with Auto Address Detection, Infrared (IrDA 1.1) data encoder/decoder. They are specified up to 25 Mbit/s. DataSheets are dated from 2012.
    Exar XR17D152, XR17D154 and XR17D158Dual, Quad and Octal PCI bus UARTs with 16C550 Compatible 5G Register Set, 64-byte Transmit and Receive FIFOs, Transmit and Receive FIFO Level Counters, Programmable TX and RX FIFO Trigger Level, Automatic RTS/CTS or DTR/DSR Flow Control, Automatic Xon/Xoff Software Flow Control, RS485 HDX Control Output with Selectable Turn-around Delay, Infrared (IrDA 1.0) Data Encoder/Decoder, Programmable Data Rate with Prescaler, Up to 6.25 Mbit/s Serial Data Rate. DataSheets are dated from 2004 and 2005.
    Exar XR17C152, XR17C154 and XR17C158Dual, Quad and Octal 5V PCI bus UARTs with 16C550 Compatible Registers, 64-byte Transmit and Receive FIFOs, Transmit and Receive FIFO Level Counters, Automatic RTS/CTS or DTR/DSR Flow Control, Automatic Xon/Xoff Software Flow Control, RS485 Half-duplex Control with Selectable Delay, Infrared (IrDA 1.0) Data Encoder/Decoder, Programmable Data Rate with Prescaler, Up to 6.25 Mbit/s Serial Data Rate. DataSheets are dated from 2004 and 2005.
    Exar XR17V252, XR17V254 and XR17V258Dual, Quad and Octal 66 MHz PCI bus UARTs with Power Management Support, 16C550 compatible register set, 64-byte TX and RX FIFOs with level counters and programmable trigger levels, Fractional baud rate generator, Automatic RTS/CTS or DTR/DSR hardware flow control with programmable hysteresis, Automatic Xon/Xoff software flow control, RS-485 half duplex direction control output with selectable turn-around delay, Infrared (IrDA 1.0) data encoder/decoder, Programmable data rate with prescaler. DataSheets are dated from 2008 and 2010.
  • Synchronous transmission

    USART chips have both synchronous and asynchronous modes. In synchronous transmission, the clock data is recovered separately from the data stream and no start/stop bits are used. This improves the efficiency of transmission on suitable channels since more of the bits sent are usable data and not character framing. An asynchronous transmission sends no characters over the interconnection when the transmitting device has nothing to send; but a synchronous interface must send "pad" characters to maintain synchronization between the receiver and transmitter. The usual filler is the ASCII "SYN" character. This may be done automatically by the transmitting device.
    USARTs were often used to create data streams compatible with the synchronous telephonic data channels. The standard method would multiplex synchronous data from many terminals to a telephonic data line such as E1 (Europe) or T1 (US).

    Application:

    Transmitting and receiving UARTs must be set for the same bit speed, character length, parity, and stop bits for proper operation. The receiving UART may detect some mismatched settings and set a "framing error" flag bit for the host system; in exceptional cases the receiving UART will produce an erratic stream of mutilated characters and transfer them to the host system.
    Typical serial ports used with personal computers connected to modems use eight data bits, no parity, and one stop bit; for this configuration the number of ASCII characters per second equals the bit rate divided by 10.
    Some very low-cost home computers or embedded systems dispense with a UART and use the CPU to sample the state of an input port or directly manipulate an output port for data transmission. While very CPU-intensive (since the CPU timing is critical), the UART chip can thus be omitted, saving money and space. The technique is known as bit-banging.

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